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ASAHI KASEI
[AKD4683-B]
AKD4683-B
AK4683 Evaluation Board Rev.0
FEATURE AKD4683-B is an evaluation board for AK4683, a single chip 24bit CODEC that has two channels of ADC and four channels of DAC with internal DIR, DIT. This board has interfaces with AKM's evaluation boards for A/D converter and D/A converter and makes easy to evaluate AK4683. Also this board has the digital audio interface and then achieves the interface with digital audio systems via opt-connector or RCA connector. Ordering guide
AKD4683-B --- AK4683 Evaluation Board 10 wire flat cable for connection with printer port of PC (IBM-AT compatible machine), control software for AK4683, driver for control software on Windows 2000/XP are packed with this. Control software does not work on Windows NT Windows 2000/XP needs an installation of driver. Windows 95/98/ME does not need an installation of driver.
FUNCTION On-board clock generator (use AK4114) Compatible with 2 types of digital audio interface - Optical output/input and RCA input/output - 10pin header for interface with external data source (x2) RCA connector for clock input with external clock source 10pin header for register control
-12V +12V GND Regulator Regulator 5V OpAmp LOUT1/ROUT1 5V Regulator 3.3V Opt Out TX1 TX1
Opt IN RX0/1/2/3 RX0 Control Data 10pin Header PORT A
OpAmp LOUT2/ROUT2 HP-Jack
AK4683
10pin Header PORT B 10pin Header AK4114
RCA IN/OUT LINA/RINA MCKI
(Note) AK4114 has DIR, DIT and X'tal oscillator. Figure 1. AKD4683-B Block Diagram (* Circuit diagram and PCB layout are attached at the end of this manual.) -12006/05
ASAHI KASEI
[AKD4683-B]
EVALUATION BOARD MANUAL
Operating sequence (1) Set up power supply lines. [+12V] (Orange) = +12V [-12V] (Blue) = -12V [AVSS1] (Black) = 0V [AVSS2] (Black) = 0V [DVSS] (Black) = 0V [PVSS] (Black) = 0V [HVSS] (Black) = 0V [DGND] (Black) = 0V Each supply line should be distributed from the power supply unit. (2) Set up evaluation mode and jumper pins. (Refer to the following item.) (3) Connect cables. (Refer to the following item.) (4) Power on. The AK4683 should be reset once bringing PDN (SW3) "L" upon power-up. (5) Set up control software registers. (Refer to the following item.) Evaluation modes (1) DAC with internal DIR 1. Connection of connector In case of digital input through RX0, optical connector PORT5 (TORX176) or RCA connector J14 (RX0) are available. In case of digital input through RX1, RX2 or RX3, only the optical connector PORT5 is available. 2. Setting of jumper pin RX0 and RX1-3 should not select optical connector at the same time. In case of digital input through RX1, RX2 or RX3, set jumpers JP32 (RX1), JP34 (RX2) or JP36 (RX3) as Table 2. Set unused channels to GND. Connector JP33 (RX0) Optical (PORT5) OPT RCA (J14) RCA Table 1. Set-up of RX0 Input RX1 RX2 RX3
Default
JP32 (RX1) JP34 (RX2) JP36 (RX3) OPT GND GND GND OPT GND GND GND OPT Table 2. Set-up of RX1, RX2, and RX3
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ASAHI KASEI
[AKD4683-B]
3. Setting of toggle switch Set SW1 (AK4114-PDN) to OFF. (2) ADC with internal DIT 1. Connection of connector For digital output, optical connector PORT3 (TOTX176) or RCA connector J13 (TX1) are available. 2. Setting of jumper pin JP30 (TX1) controls digital output (optical connector PORT3 or RCA connector J13). Connector JP30(TX) Optical (PORT3) OPT RCA (J13) RCA Table 3. Set-up of TX 3. Setting of toggle switch Set SW1 (AK4114-PDN) to OFF. (3) DAC with external DIR 1. Connection of connector For digital input, RCA connector J10 (AK4114-RX0) is available. 2. Setting of jumper pin Setting of interface signal of PORTA/PORTB: AK4114 (U5) is as follows. (Default input of PORTA is SDTIA1.) PORT PORTA PORTB JP22 (BICKA) Short Open JP24 JP16 JP17 JP19 (OLRCKA) (ILRCKA) (SDTIA1) (SDTIA2) Short DIR GND Open Open GND GND Open Table 4. Set-up of AK4114 interface (1/2) JP28 JP25 JP21 JP29 (LRCKB) (SDTIB) (MCLK-SEL) (MCLK) Open GND Open MCKO1 Open DIR MCKO1 Short Table 5. Set-up of AK4114 interface (2/2) JP20 (SDTIA3) GND GND
Default
PORT PORTA PORTB
JP27 (BICKB) Open Short
JP15 (XTIA) Open Open
JP23 (SDTO) SDTOA SDTOB
3. Setting of toggle switch Set SW1 (AK4114-PDN) to ON. 4. Setting of DIP switch Set SW2 (PORTA-DIR/4683): 2pin (DIF1) to OFF.
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ASAHI KASEI
[AKD4683-B]
(4) ADC with external DIT 1. Connection of connector For digital output, RCA connector J11 (AK4114-TX1) is available. 2. Setting of jumper pin Setting of interface signal of PORTA/PORTB: AK4114 (U5) is as follows. PORT PORTA PORTB JP22 (BICKA) Short Open JP24 JP16 JP17 JP19 (OLRCKA) (ILRCKA) (SDTIA1) (SDTIA2) Open GND GND Short Open GND GND Open Table 6. Set-up of AK4114 interface (1/2) JP28 JP25 JP21 JP29 (LRCKB) (SDTIB) (MCLK-SEL) (MCLK) Open GND Open Open Open Open GND Short Table 7. Set-up of AK4114 interface (2/2) JP20 (SDTIA3) GND GND
PORT PORTA PORTB
JP27 (BICKB) Open Short
JP15 (XTIA) Short Short
JP23 (SDTO) SDTOA SDTOB
3. Setting of toggle switch Set SW1 (AK4114-PDN) to ON. 4. Setting of DIP switch Set SW2 (PORTA-DIR/4683): 4pin (CM0) to ON. (5) Internal loop back (Analog input ADC DAC Analog output) 1. Connection of connector For analog input, RCA connector J3 (LINA)/ J6 (RINA) are available. For analog output, RCA connector J1 (LOUT1)/ J4 (ROUT1), J2 (LOUT2)/ J5 (ROUT2) are available. 2. Setting of jumper pin
Input LIN1/ RIN1 LIN2/ RIN2 LIN3/ RIN3 LIN4/ RIN4 LIN5/ RIN5 LIN6/ RIN6 JP1 (LIN1)/ JP7 (RIN1) LINA/ RINA Open Open Open Open Open JP2 (LIN2)/ JP8 (RIN2) Open LINA/ RINA Open Open Open Open JP3 (LIN3)/ JP9 (RIN3) Open Open LINA/ RINA Open Open Open JP4 (LIN4)/ JP10 (RIN4) Open Open Open LINA/ RINA Open Open JP5 (LIN5)/ JP11 (RIN5) Open Open Open Open LINA/ RINA Open JP6 (LIN6)/ JP12 (RIN6) Open Open Open Open Open LINA/ RINA (Default)
Table 8. Set-up of LINA/RINA
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ASAHI KASEI
[AKD4683-B]
Input LIN1/ RIN1 LIN2/ RIN2 LIN3/ RIN3 LIN4/ RIN4 LIN5/ RIN5 LIN6/ RIN6
JP1 (LIN1)/ JP7 (RIN1) LINB/ RINB Open Open Open Open Open
JP2 (LIN2)/ JP8 (RIN2) Open LINB/ RINB Open Open Open Open
JP3 (LIN3)/ JP9 (RIN3) Open Open LINB/ RINB Open Open Open
JP4 (LIN4)/ JP10 (RIN4) Open Open Open LINB/ RINB Open Open
JP5 (LIN5)/ JP11 (RIN5) Open Open Open Open LINB/ RINB Open
JP6 (LIN6)/ JP12 (RIN6) Open Open Open Open Open LINB/ RINB
Table 9. Set-up of LINB/RINB 3. Setting of toggle switch Set SW1 (AK4114-PDN) to OFF.
Register control
AKD4683-B can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT4 (uP-I/F) to PC by 10-line flat cable packed with this. Take care of the direction of connector. There is a mark at pin#1. The pin layout of PORT4 is as Figure 2. Mode SW2_8 4-wire Serial L I2C H Table 10. Set-up of Parallel mode and Serial mode
PORT4 uP I/F 2
GND
GND
GND
GND
GND CSN
10
NC
CDTO
CDTI
Figure 2. PORT4 pin layout Control software is packed with this evaluation board. Software operation procedure is included in evaluation board manual.
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1
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ASAHI KASEI
[AKD4683-B]
Set-up DIP switch (SW2)
No. 1 2 3 4 5 6 7 8 Name ON ("H") OFF ("L") DIF0 Setting of AK4114 Audio Interface Format DIF1 (Refer Table 12.) DIF2 Selection of AK4114 Clock Mode (Clock Source) CM0 (Refer Table 13.) CM1 OCKS0 Selection of AK4114 Master Clock Output frequency (Refer Table 14.) OCKS1 I2C I2C-bus control mode 4-wire serial control mode Table 11. Set up modes of AK4114 (U5) and AK4683 (U1) DIF2 DIF1 DIF0 DAUX SDTO 16bit, Right justified 18bit, Right justified 20bit, Right justified 24bit, Right justified 24bit, Left justified 24bit, I2S 24bit, Left justified 24bit, I2S Default OFF ON ON OFF OFF OFF OFF OFF
Mode 0 1 2 3 4 5 6 7
0 0 0 24bit, Left justified 0 0 1 24bit, Left justified 0 1 0 24bit, Left justified 0 1 1 24bit, Left justified 1 0 0 24bit, Left justified 1 0 1 24bit, I2S 1 1 0 24bit, Left justified 1 1 1 24bit, I2S Table 12. AK4114 Audio Interface Format CM1 0 0 CM0 0 1
LRCK I/O H/L O H/L O H/L O H/L O H/L O L/H O H/L I L/H I
BICK 64fs 64fs 64fs 64fs 64fs 64fs 64-128fs 64-128fs I/O O O O O O O I I

Mode 0 1 2 3
UNLOCK PLL X'tal ON ON (Note1) OFF ON 0 ON ON 1 0 1 ON ON 1 1 ON ON Table 13. AK4114 Clock Mode (Clock Source) OCKS1 OCKS0 MCKO1 MCKO2 X'tal 0 0 256fs 256fs 256fs 0 1 256fs 128fs 256fs 1 0 512fs 256fs 512fs 1 1 128fs 64fs 128fs Table 14. AK4114 Master Clock Output Frequency
Clock source PLL X'tal PLL X'tal X'tal
SDTO RX DAUX RX DAUX DAUX

No. 0 1 2 3
fs (max) 96 kHz 96 kHz 48 kHz 192 kHz

Toggle switch
[SW3] (PDN): Switch for power down reset of AK4683 (U1). Keep "H" during operation of AK4683 (U1). Power down reset of AK4683 will be done by setting SW3 (PDN) to "L" once, after power on. [SW1] (AK4114-PDN): Switch for power down reset of AK4114 (U5). Keep "H" during operation of AK4114 (U5). Power down reset of AK4114 (U5) will be done by setting SW1 to "L" once, after power on.
LED indication [LE1] (INT): [LED1] (ERF): LED for output of AK4683 (U1): INT. It turns on when output of AK4683 (U1): INT is "H". LED for output of AK4114 (U5): INT0.It turns on when output of AK4114 (U5): INT0 is "H".
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ASAHI KASEI
[AKD4683-B]
Set up Jumper pins
Jumper 1 JP1 (LIN1) JP2 (LIN2) JP3 (LIN3) JP4 (LIN4) JP5 (LIN5) JP6 (LIN6) JP7 (RIN1) JP8 (RIN2) JP9 (RIN3) JP10 (RIN4) JP11 (RIN5) JP12 (RIN6) JP15 (XTIA) JP16 (ILRCKA) JP17 (SDTIA1) JP19 (SDTIA2) JP20 (SDTIA3) JP21 (MCLK-SEL) JP22 (BICKA) JP23 (SDTO) JP24 (OLRCKA) JP25 (SDTIB) JP27 (BICKB) JP28 (LRCKB) JP29 (MCLK) JP30 (TX) JP32 (RX1) JP33 (RX0) JP34 (RX2) JP35 (GND) JP36 (RX3) LINA Open Open Open Open Open RINA Open Open Open Open Open Open Short GND GND GND Open Short SDTOA Open GND Open Open Open OPT GND OPT GND Short GND (Default) 2 LINA Open Open Open Open Open RINA Open Open Open Open Open Open Short GND GND GND Open Short SDTOA Open GND Open Open Open OPT GND OPT GND Short GND Evaluation Mode 3 LINA Open Open Open Open Open RINA Open Open Open Open Open Open Short DIR GND GND MCKO1 Short SDTOA Open GND Open Open Open OPT GND OPT GND Short GND 4 LINA Open Open Open Open Open RINA Open Open Open Open Open Short Open GND GND GND Open Short SDTOA Short GND Open Open Open OPT GND OPT GND Short GND 5 LINA Open Open Open Open Open RINA Open Open Open Open Open Open Short GND GND GND Open Short SDTOA Open GND Open Open Open OPT GND OPT GND Short GND
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ASAHI KASEI
[AKD4683-B]
Set up control software registers
After the reset, setting example files are available as follows in CD-ROM to set registers in each evaluation modes. Evaluation Mode 1 ADC/DAC: ak4683_adc_dac_mode1.akr DIR/DIT: ak4683_dir_dit_mode1.akr Evaluation Mode 2 ADC/DAC: ak4683_adc_dac_mode2.akr DIR/DIT: ak4683_dir_dit_mode2.akr Evaluation Mode 3 ADC/DAC: ak4683_adc_dac_mode3.akr DIR/DIT: ak4683_dir_dit_mode3.akr Evaluation Mode 4 ADC/DAC: ak4683_adc_dac_mode4.akr DIR/DIT: ak4683_dir_dit_mode4.akr Evaluation Mode 5 ADC/DAC: ak4683_adc_dac_mode5.akr DIR/DIT: ak4683_dir_dit_mode5.akr
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ASAHI KASEI
[AKD4683-B]
Analog Input Circuit
C20 + 1u J3 LINA
JP1 LIN1 LIN1
LINA LINB LINA LINB LINA LINB
2 3 1
MR-552LS VSS
JP2 LIN2 LIN2
JP3 LIN3 LIN3
C52 + 1u
2 3 1
J7 LINB
JP4 LIN4 LIN4
LINA LINB LINA LINB LINA LINB VSS
MR-552LS
JP5 LIN5 LIN5
JP6 LIN6 LIN6
JP7 RIN1 RIN1
RINA RINB RINA RINB RINA RINB
C25 + 1u
2 3 1
J6 RINA
MR-552LS VSS
JP8 RIN2 RIN2
JP9 RIN3 RIN3
C56 + 1u
2 3 1
J9 RINB
JP10 RINA RIN4 RIN4 RINB VSS
MR-552LS
JP11 RINA RIN5 RIN5 RINB
JP12 RINA RIN6 RIN6 RINB
Figure 3. Analog Input Circuit
For analog input, RCA connector: J3 (LINA), J6 (RINA), J7 (LINB), J9 (RINB) are available to use. Analog inputs are single-ended and input ranges of each channel are nominally 6.1Vpp@5V (R1~R12=47k, R=14,15=24k).
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ASAHI KASEI
[AKD4683-B]
Analog Output Circuit
C18 22u
3 2
LOUT1
+ -
P12V U2A R34 NJM5532 220
1
C19 22u
2 3 1
J1
LOUT1
LOUT2 R35 10k
5 6
+ 4
P12V U2B R36 NJM5532 220
7
8
+
+
8
R33 10k HVSS
2 3 1
J2
LOUT2
N12V VSS
MR-552LS HVSS
330p C21
N12V 330p C22 VSS
4
MR-552LS
R38 4.7K
R37 4.7k
R40 4.7K
R39 4.7k
HVSS
HVSS
+
ROUT1
3 2
+ 4
R42 10k HVSS
1
2 3 1
J4
ROUT1
+
C23 22u
P12V U3A R41 NJM5532 220
P12V C24 22u
5 6 8
8
ROUT2
+ 4
U3B R44 NJM5532 220
7
R43 10k MR-552LS HVSS
2 3 1
J5
ROUT2
N12V 330p C26 VSS
N12V 330p C27 VSS
MR-552LS
R47 4.7K
R45 4.7k
R48 4.7K
R46 4.7k
HVSS
HVSS
Figure 4. Analog Output Circuit For analog output, RCA connector: J1 (LOUT1), J4 (ROUT1), J2 (LOUT2), J5 (ROUT2) are available to use. Analog outputs are single-ended and output ranges of each channel are nominally 3.0Vpp@5V. Output range: AOUT is proportional to AVDD2 (AOUT=0.6 x AVDD2=0.6 x 5=3.0).
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ASAHI KASEI
[AKD4683-B]
Digital Input Circuit (Internal DIR)
RX0/1/2/3
6 5
PORT5
6 5 GND VCC GND OUT
4 3 2 1
L5 10u VDD C68 0.1u C69 + 10u R84 470 C71 R85 75 VSS 0.1u OPT JP33 RX0 RCA RX0 OPT RX1 GND VSS JP34 RX2 OPT RX2 GND VSS JP36 RX3 OPT RX3 GND VSS
TORX176
JP32 RX1
PVSS RX0 J14
2 3 1
MR-552LS VSS
Figure 5. Digital Input Circuit (Internal DIR) In case of input through RX0, optical connector PORT5 (TORX176) or RCA connector J14 (RX0) are available. In case of input through RX1, RX2 or RX3, only the optical connector PORT5 is available. Digital input: RX0, RX1, RX2 and RX3 is available to select overwriting IPS10 bit of control register (Addr=03H) of AK4683: DIR/DIT part by control software.
Digital Input Circuit (External DIR: PORT A)
J10 AK4114-RX0
2 3 1
C30 R54 75 0.1u
MR-552LS
GND GND Figure 6. Digital Input Circuit (External DIR)
For digital input, RCA connector: J10 (AK4114-RX0) is available.
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ASAHI KASEI
[AKD4683-B]
Digital Output Circuit (Internal DIT)
TX
5 6
PORT3
5 6 IN VCC IF GND
4 3 2 1
VDD R72 1k C67 0.1u DVSS R78 330 JP30 TX
OPT TX RCA
TOTX176 DVSS TX J13
2 3 1
T4 DA02
MR-552LS
R79 100
VSS VSS Figure 7. Digital Output Circuit (Internal DIT)
For digital output, optical connector PORT3 (TOTX176) or RCA connector J13 (TX1) are available.
Digital Output Circuit (External DIT)
J11 AK4114-TX1
2 3 1
T1 DA02 R58 150
R57 240
MR-552LS
DGND2
GND
Figure 8. Digital Output Circuit (External DIT) For digital output, RCA connector: J11 (AK4114-TX1) is available.
Headphone Output Circuit
+ R51 HPR (short) R49 HPL (short)
6 4 3
J8
HP
C29 100u +
01J0154 VSS
C28 100u
Figure 9. Headphone Output Circuit For headphone output, stereo mini jack J8 (HP) are available.
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ASAHI KASEI
[AKD4683-B]
Control Software Manual Set-up of evaluation board and control software
1. Set up the AKD4683-B according to previous term. 2. Connect IBM-AT compatible PC with AKD4683-B by 10-line type flat cable (packed with AKD4683-B). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows 2000/XP. Please refer "Installation Manual of Control Software Driver by AKM device control software". In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows NT.) 3. Insert the CD-ROM labeled "AKD4683-B Evaluation Kit" into the CD-ROM drive. 4. Access the CD-ROM drive, and double-click the icon of "AKD4683-B_adc_dac.exe"and "AKD4683-B_dir_dit.exe", and set up the control program. AKD4683-B_adc_dac.exe: AK4683 ADC/DAC control program AKD4683-B_dir_dit.exe: AK4683 DIR/DIT control program 5. Then evaluate according to the follows.
Operation flow
Keep the following flow. 1. Set up the control program according to explanation above. 2. Click "Port Reset" button.
Explanation of each buttons
1. [Port Reset]: 2. [Write default]: 3. [All Write]: 4. [Function1]: 5. [Function2]: 6. [Function3]: 7. [Function4]: 8. [Function5]: 9. [SAVE]: 10. [OPEN]: 11. [Write]: Set up the USB interface board (AKDUSBIF-A). Initialize the registers. Write all registers data that is currently displayed. Dialog to write data by keyboard operation. Dialog to write data by keyboard operation. The sequence of register setting can be set and executed. The sequence that is created on [Function3] can be assigned to buttons and executed. The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. Save the current register setting. Write the saved values to all register. Dialog to write data by mouse operation.
Indication of data
Input data is indicated on the register map. Red letter indicates "H" or "1" and blue one indicates "L" or "0". Blank is the part that is not defined in the datasheet.
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ASAHI KASEI
[AKD4683-B]
Explanation of each dialog 1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register. Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data becomes "H" or "1". If not, "L" or "0". When writing the input data to register, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog]: Dialog to write data by keyboard operation
Address Box: Input registers address in 2 figures of hexadecimal. Data Box: Input registers data in 2 figures of hexadecimal. When writing the input data to register, click [OK] button. If not, click [Cancel] button.
3. [Function2 Dialog]: Dialog to evaluate ATT
This is a dialog corresponding to address: 0CH, 0DH, 0EH, 0FH, 10H, and 11H of AK4683. Address Box: Input registers address in 2 figures of hexadecimal. Start Data Box: Input starts data in 2 figures of hexadecimal. End Data Box: Input end data in 2 figures of hexadecimal. Interval Box: Data is written to register by this interval. Step Box: Data changes by this step. Mode Select Box: With checking this check box, data reaches end data, and returns to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 Without checking this check box, data reaches end data, but does not return to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 When writing the input data to register, click [OK] button. If not, click [Cancel] button.
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ASAHI KASEI
[AKD4683-B]
4. [Save] and [Open] 4-1. [Save]
Save the current register setting data to the file. The extension of file name is "akr". (Operation flow) (1) Click [Save] Button. (2) Set the file name and push [Save] Button. The extension of file name is "akr".
4-2. [Open]
The register setting data saved to the file by [Save] is written to register. The file type is the same as [Save]. (Operation flow) (1) Click [Open] Button. (2) Select the file (*.akr) and Click [Open] Button.
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ASAHI KASEI
[AKD4683-B]
5. [Function3 Dialog]
The sequence of register setting can be set and executed. (1) Click [F3] Button. Set the control sequence. Set the address, Data and Interval time. Set "-1" to the address of the step where the sequence should be paused. (3) Click [Start] button. Then this sequence is executed. The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step. This sequence can be saved and opened by [Save] and [Open] button on the [Function3] window. The extension of file name is "aks".
Figure 1. Window of [F3]
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ASAHI KASEI
[AKD4683-B]
6. [Function4 Dialog]
The sequence that is created on [Function3] can be assigned to buttons and executed. When [F4] button is clicked, the window as shown in Figure 2 opens.
Figure 2. [F4] window
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ASAHI KASEI
[AKD4683-B]
6-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks). The sequence file name is displayed as shown in Figure 3.
Figure 3. [F4] window(2) (2) Click [START] button, then the sequence is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The sequence file names can assign be saved. The file name is *.ak4. [OPEN]: The sequence file names assign that are saved in *.ak4 are loaded.
6-3. Note
(1) [Function4] doesn't support the pause function of sequence function. (2) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (3) When the sequence is changed in [Function3], the file should be loaded again in order to reflect the change.
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ASAHI KASEI
[AKD4683-B]
7. [Function5 Dialog]
The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. When [F5] button is clicked, the following window as shown in Figure 4opens.
Figure 4. [F5] window
7-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr). (2) Click [WRITE] button, then the register setting is executed.
7-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The register setting file names assign can be saved. The file name is *.ak5. [OPEN]: The register setting file names assign that are saved in *.ak5 are loaded.
7-3. Note
(1) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (2) When the register setting is changed by [Save] Button in main window, the file should be loaded again in order to reflect the change.
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ASAHI KASEI
[AKD4683-B]
Measure Result
1) ADC part [Measurement condition] * Measurement unit : Audio Precision * MCLK : 256fs (fs=48kHz, 96kHz) * BICK : 64fs * fs : 48kHz, 96kHz * BW : 20Hz20kHz (fs=48kHz), 20Hz40kHz (fs=96kHz) * Bit : 24bit * Power Supply : AVDD1=AVDD2=DVDD=PVDD= TVDD=HVDD =5V, * Interface : Internal DIT (fs=48kHz, 96kHz) * Temperature : Room Temp fs=48kHz Parameter S/(N+D) DR DR S/N S/N fs=96kHz Parameter S/(N+D) DR DR S/N S/N
Input signal 1kHz, -0.5dB 1kHz, -60dB 1kHz, -60dB No signal No signal
Measurement filter 20kLPF 20kLPF 20kLPF, A-weighted 20kLPF 20kLPF, A-weighted
Results 91.5 dB 98.9 dB 101.6 dB 99.0 dB 101.9 dB
Input signal 1kHz, -0.5dB 1kHz, -60dB 1kHz, -60dB No signal No signal
Measurement filter fs/2 fs/2 20kLPF, A-weighted fs/2 20kLPF, A-weighted
Results 92.9 dB 98.0 dB 103.1 dB 98.0 dB 103.1 dB
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ASAHI KASEI
[AKD4683-B]
2) DAC part [Measurement condition] * Measurement unit : Audio Precision * MCLK : 256fs (fs=48kHz, 96kHz), 128fs (fs=192kHz) * BICK : 64fs * fs : 48kHz, 96kHz, 192kHz * BW : 20Hz20kHz (fs=48kHz), 20Hz40kHz (fs=96kHz), 20Hz40kHz (fs=192kHz) * Resolution : 24bit * Power Supply : AVDD1=AVDD2=DVDD=PVDD= TVDD=HVDD=5V * Interface : Internal DIR (48kHz, 96kHz, 192kHz) * Temperature : Room Temp fs=48kHz Parameter S/(N+D) DR DR S/N S/N fs=96kHz Parameter S/(N+D) DR DR S/N S/N fs=192kHz Parameter S/(N+D) DR DR S/N S/N
Input signal 1kHz, 0dB 1kHz, -60dB 1kHz, -60dB "0" data "0" data
Measurement filter 20kLPF 20kLPF 22kLPF, A-weighted 20kLPF 22kLPF, A-weighted
Results 98.0 dB 103.7 dB 105.8 dB 103.4 dB 106.0 dB
Input signal 1kHz, 0dB 1kHz, -60dB 1kHz, -60dB "0" data "0" data
Measurement filter 40kLPF 40kLPF 22kLPF, A-weighted 40kLPF 22kLPF, A-weighted
Results 96.5 dB 102.0 dB 105.8 dB 101.0 dB 106.0 dB
Input signal 1kHz, 0dB 1kHz, -60dB 1kHz, -60dB "0" data "0" data
Measurement filter 40kLPF 40kLPF 22kLPF, A-weighted 40kLPF 22kLPF, A-weighted
Results 96.8 dB 102.5 dB 105.8 dB 101.2 dB 105.8 dB
- 21 -
2006/05
ASAHI KASEI
[AKD4683-B]
1.ADC (ADC fs=48kHz)
AK4683 FFT fs=48kHz, -0.5dB input AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
Figure 10. FFT(Input Frequency =1kHz,Input Level=-0.5dBFS)
AK4683 FFT fs=48kHz, -60dB input AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
Figure 11. FFT(Input Frequency =1kHz,Input Level=-60dBFS)
- 22 -
2006/05
ASAHI KASEI
[AKD4683-B]
(ADC fs=48kHz)
AK4683 FFT fs=48kHz, No signal input AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
Figure 12. FFT(noise floor)
AK4683 THD+N vs Input Level fs=48kHz AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 d B F S -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -120 -110 -100 -90 -80 -70 -60 dBr -50 -40 -30 -20 -10 +0
Figure 13. THD + N vs Input Level (Input Frequency =1kHz)
- 23 -
2006/05
ASAHI KASEI
[AKD4683-B]
(ADC fs=48kHz)
AK4683 THD+N vs Input Frequency fs=48kHz AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 d B F S -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
Figure 14. THD + N vs Input Frequency (Input Level=-0.5dBFS)
AK4683 Linarity fs=48kHz AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 d B F S -60 -70 -80 -90 -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 -90 -80 -70 dBr -60 -50 -40 -30 -20 -10 +0
Figure 15. Linearity (Input Frequency =1kHz)
- 24 -
2006/05
ASAHI KASEI
[AKD4683-B]
(ADC fs=48kHz)
AK4683 Frequency Respons fs=48kHz AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -0.1 -0.2 -0.3 -0.4 d B F S -0.5 -0.6 -0.7 -0.8 -0.9 -1 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 16. Frequency Response (Input Level=-0.5dBFS)
AK4683 Crosstalk fs=48kHz AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-70 -75 -80 -85 -90 -95 -100 -105 d B -110 -115 -120 -125 -130 -135 -140 -145 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
Figure 17. Crosstalk (Input Level=-0.5dBFS)
- 25 -
2006/05
ASAHI KASEI
[AKD4683-B]
(ADC fs=96kHz)
AK4683 FFT fs=96kHz, -0.5dB input AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 40 50 100 200 500 1k Hz 2k 5k 10k 20k 40k
Figure 18. FFT(Input Frequency =1kHz,Input Level=-0.5dBFS)
AK4683 FFT fs=96kHz, -60dB input AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 40 50 100 200 500 1k Hz 2k 5k 10k 20k 40k
Figure 19. FFT(Input Frequency =1kHz,Input Level=-60dBFS)
- 26 -
2006/05
ASAHI KASEI
[AKD4683-B]
(ADC fs=96kHz)
AK4683 FFT fs=96kHz, No input AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 40 50 100 200 500 1k Hz 2k 5k 10k 20k 40k
Figure 20. FFT(Noise floor)
AK4683 THD+N vs Input Level fs=96kHz AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 d B F S -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -140 -130 -120 -110 -100 -90 -80 -70 dBr -60 -50 -40 -30 -20 -10 +0
Figure 21. THD + N vs Input Level (Input Frequency =1kHz)
- 27 -
2006/05
ASAHI KASEI
[AKD4683-B]
(ADC fs=96kHz)
AK4683 THD+N vs Input Frequency fs=96kHz AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 d B F S -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 40 50 100 200 500 1k Hz 2k 5k 10k 20k 40k
Figure 22. THD + N vs Input Frequency (Input Level=-0.5dBFS)
AK4683 Linearity fs=96kHz AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 d B F S -60 -70 -80 -90 -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 -90 -80 -70 dBr -60 -50 -40 -30 -20 -10 +0
Figure 23. Linearity (Input Frequency =1kHz)
- 28 -
2006/05
ASAHI KASEI
[AKD4683-B]
(ADC fs=96kHz)
AK4683 Frequency Respons fs=96kHz AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -0.1 -0.2 -0.3 -0.4 d B F S -0.5 -0.6 -0.7 -0.8 -0.9 -1 40
50
100
200
500
1k Hz
2k
5k
10k
20k
40k
Figure 24. Frequency Response (Input Level=-0.5dBFS)
AK4683 Crosstalk fs=96kHz AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-70 -75 -80 -85 -90 -95 -100 -105 d B -110 -115 -120 -125 -130 -135 -140 -145 -150 40 50 100 200 500 1k Hz 2k 5k 10k 20k 40k
Figure 25. Crosstalk (Input Level=-0.5dBFS)
- 29 -
2006/05
ASAHI KASEI
[AKD4683-B]
2.DAC (DAC fs=48kHz)
AK4683 FFT fs=48kHz, 0dBFS input AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
Figure 26. FFT(Input Frequency =1kHz, Input Level=0dBFS)
AK4683 FFT fs=48kHz, -60dB input AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
Figure 27. FFT(Input Frequency =1kHz, Input Level=-60dBFS)
- 30 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=48kHz)
AK4683 FFT fs=48kHz, No signal input AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
Figure 28. FFT(noise floor)
AK4683 FFT (Out of Band Noise) fs=48kHz, -60dB input AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k Hz 2k 5k 10k 20k 50k 100k
Figure 29. FFT(out-of-band noise)
- 31 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=48kHz)
AK4683 THD+N vs Input Level fs=48kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 d B r A -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -120 -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0
Figure 30. THD+N vs Input Level (Input Frequency =1kHz)
AK4683 THD+N vs Input Frequency fs=48kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 d B r A -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
Figure 31. THD+N vs Input Frequency (Input Level=0dBFS)
- 32 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=48kHz)
AK4683 Linearity fs=48kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 -90 -80 -70 dBFS -60 -50 -40 -30 -20 -10 +0
Figure 32. Linearity (Input Frequency =1kHz)
AK4683 Frequency Respons fs=48kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+1 +0.8 +0.6 +0.4 +0.2 +0 -0.2 -0.4 -0.6 -0.8 -1 20
d B r A
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 33. Frequency Response (Input Level=0dBFS)
- 33 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=48kHz)
AK4683 Crosstalk fs=48kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 -97.5 d B -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
Figure 34. Cross-talk (Input Level=0dBFS)
- 34 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=96kHz)
AK4683 FFT fs=96kHz, 0dB input AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 40 50 100 200 500 1k Hz 2k 5k 10k 20k 40k
Figure 35. FFT(Input Frequency =1kHz, Input Level=0dBFS)
AK4683 FFT (Notch) fs=96kHz, 0dB input AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 40 50 100 200 500 1k Hz 2k 5k 10k 20k 40k
Figure 36. FFT(Input Frequency =1kHz, Input Level=0dBFS,Notch-on)
- 35 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=96kHz)
AK4683 FFT fs=96kHz, -60dB input AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 40 50 100 200 500 1k Hz 2k 5k 10k 20k 40k
Figure 37. FFT(Input Frequency =1kHz, Input Level=-60dBFS)
AK4683 FFT fs=96kHz, No signal input AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 40 50 100 200 500 1k Hz 2k 5k 10k 20k 40k
Figure 38. FFT(noise floor)
- 36 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=96kHz)
AK4683 THD+N vs Input Level fs=96kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 d B r A -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -120 -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0
FigureFigure 39. THD+N vs Input Level (Input Frequency =1kHz)
AK4683 THD+N vs Input Frequency fs=96kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 d B r A -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 40 50 100 200 500 1k Hz 2k 5k 10k 20k 40k
Figure 40. THD+N vs fin (Input Level=0dBFS)
- 37 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=96kHz)
AK4683 Linearity fs=96kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 -90 -80 -70 dBFS -60 -50 -40 -30 -20 -10 +0
Figure 41. Linearity (Input Frequency =1kHz)
AK4683 Frequency Respons fs=96kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+1 +0.8 +0.6 +0.4 +0.2 +0 -0.2 -0.4 -0.6 -0.8 -1 40
d B r A
50
100
200
500
1k Hz
2k
5k
10k
20k
40k
Figure 42. Frequency Response (Input Level=0dBFS)
- 38 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=96kHz)
AK4683 Crosstalk fs=96kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 -97.5 d B -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 40 50 100 200 500 1k Hz 2k 5k 10k 20k 40k
Figure 43. Cross-talk (Input Level=0dBFS)
- 39 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=192kHz)
AK4683 FFT fs=192kHz 0dBFS input AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 90 200 500 1k 2k Hz 5k 10k 20k 50k 80k
Figure 44. FFT(Input Frequency =1kHz, Input Level=0dBFS)
AK4683 FFT(Notch) fs=192kHz 0dBFS input AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 90 200 500 1k 2k Hz 5k 10k 20k 50k 80k
Figure 45. FFT(Input Frequency =1kHz, Input Level=0dBFS,Notch-on)
- 40 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=192kHz)
AK4683 FFT fs=192kHz -60dBFS input AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 90 200 500 1k 2k Hz 5k 10k 20k 50k 80k
Figure 46. FFT(Input Frequency =1kHz, Input Level=-60dBFS)
AK4683 FFT fs=192kHz No signal input AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 90 200 500 1k 2k Hz 5k 10k 20k 50k 80k
Figure 47. FFT(noise floor)
- 41 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=192kHz)
AK4683 THD+N vs Input Level fs=192kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 d B r A -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -140 -130 -120 -110 -100 -90 -80 -70 dBFS -60 -50 -40 -30 -20 -10 +0
Figure 48. THD+N vs Input Level (Input Frequency =1kHz)
AK4683 THD+N vs Input Frequency fs=192kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 d B r A -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 90 200 500 1k 2k Hz 5k 10k 20k 50k 80k
Figure 49. THD+N vs Input Frequency (Input Level=0dBFS)
- 42 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=192kHz)
AK4683 Linearity fs=192kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 -90 -80 -70 dBFS -60 -50 -40 -30 -20 -10 +0
Figure 50. Linearity (f Input Frequency =1kHz)
AK4683 Frequency Respons fs=192kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+1 +0.75 +0.5 +0.25 -0 -0.25 -0.5 d B r A -0.75 -1 -1.25 -1.5 -1.75 -2 -2.25 -2.5 -2.75 -3 90 200 500 1k 2k Hz 5k 10k 20k 50k 80k
Figure 51. Frequency Response (Input Level=0dBFS)
- 43 -
2006/05
ASAHI KASEI
[AKD4683-B]
(DAC fs=192kHz)
AK4683 Crosstalk fs=192kHz AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80 -82.5 -85 -87.5 -90 -92.5 -95 -97.5 d B -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 90 200 500 1k 2k Hz 5k 10k 20k 50k 80k
Figure 52. Cross-talk (Input Level=0dBFS)
- 44 -
2006/05
ASAHI KASEI
[AKD4683-B]
Revision History
Date Manual Board (YY/MM/DD) Revision Revision 06/05/12 KM080900 0 06/05/25 KM080901 0 Reason Contents
First Edition Error Correct P.3. (3) DAC with external DIR 2. Setting of jumper pin Add (Default input of PORTA is SDTIA1.) JP16 (ILRCK) JP16 (ILRCKA) JP19(SDTIA2) PORTA: DIR GND JP20(SDTIA3) PORTA: DIR GND Add column of JP23 (SDTO) 4. Setting of DIP switch P.4. (4) ADC with external DIT 2. Setting of jumper pin JP16 (ILRCK) JP16 (ILRCKA) Add column of JP23 (SDTO) 4. Setting of DIP switch SW2 (PORT-DIR/4683) SW2 (PORTA-DIR/4683) P.7. Set up Jumper pins JP15 (XTIA) Evaluation Mode 4 Open Short JP16 (ILRCKA) Evaluation Mode 4 Short Open JP19(SDTIA2) Evaluation Mode 3: DIR GND JP20(SDTIA3) Evaluation Mode 3: DIR GND JP21(MCLK-SEL) Evaluation Mode 1, 2, 4, 5 MCKO1 Open JP24 (OLRCK) JP24 (OLRCKA) JP24 (OLRCKA) Evaluation Mode 4 Open Short JP25 (SDTIB) Evaluation Mode 3 DIR GND JP27 (BICKB) Evaluation Mode 1, 2, 3, 4, 5 Short Open JP28 (LRCKB) Evaluation Mode 1, 2, 3, 4, 5 Short Open JP29(MCLK) Evaluation Mode 1, 2, 3, 4, 5 MCKI Open
- 45 -
2006/05
ASAHI KASEI
[AKD4683-B]
IMPORTANT NOTICE * These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. * AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. * Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. * AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. * It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.
- 46 -
2006/05
5
4
3
2
1
RIN6
LIN6
RIN5
LIN5
RIN4
LIN4
RIN3
LIN3
RIN2
LIN2
RIN1
LIN1
AVDD1
D
D
R1 47k VSS R13 12k
61
R2 47k
R3 47k
R4 47k
R5 47k
R6 47k
R7 47k
R8 47k
R9 47k
R10 47k
R11 47k
R12 47k
10u C1 + 0.1u C2
VSS
49 AVSS1
59
57
55
53
62
60
58
56
54
52
51
U1 C3 10u PVDD C4 0.1u
1 PVDD
R
64
63
LIN6
LIN5
LIN4
LIN3
LIN2
LIN1
AVDD1
RIN6
RIN5
RIN4
RIN3
RIN2
PVSS
RIN1
50
RX0
I2C
C
RX1
RX2
C5 0.1u RX3
6 RX3 AVDD2 43
INT
7
INT
VCOM
42
8
VOUT
R16 (short) CDTO R17 (short) LRCKB R18 (short) BICKB R19 (short) SDTOB R20 (short) OLRCKA
B
AK4683
C7 0.1u
41
C8 + 2.2u
ROUT1
TST1
9
CDTO
LOUT1
40
10
LRCKB
ROUT2
39
11
BICKB
LOUT2
38
12
SDTOB
MUTET
37
C9
13 OLRCKA HPL 36
+
1u
R21 (short) ILRCKA R22 (short) BICKA R23 (short) SDTOA
16 SDTOA SDTIA1 SDTIA2 SDTIA3 MCLK2 MCKO SDTIB DVDD DVSS TVDD CCLK CDTI PDN CSN XTO HVDD 33 15 BICKA HVSS 34 14 ILRCKA HPR 35
C10 0.1u
C11 10u
XTI
17
18
19
20
21
22
23
TX
24
25
26
27
28
29
30
31
12.288MHz C12 0.1u + C13 0.1u
1
X1
2
C14 10u
C15 10u
C16 5p
C17 5p
VSS
VSS
A
32
MCKO
4683-TVDD
DVDD
(short)
(short)
PDN
R24 TX
R25
R26
R27
R28
R29
R30
R31
R32
(short) (short) (short) (short) (short) (short) (short)
MCLK2
CDTI/SDA
CCLK/SCL
SDTIA1
SDTIA2
SDTIA3
SDTIB
CSN
MCKI
5
4
3
+
+ +
+
RISEL
48
2
RX0
ROPIN
47
R14 24k
3
I2C
LOPIN
46
4
RX1
LISEL
45
R15 24k
C
5
RX2
AVSS2
44
C6 10u
VSS AVDD2
VSS ROUT1
LOUT1
ROUT2
LOUT2
VSS HPL
B
HPR
VSS HVDD
+
A
Title Size
Document Number
AKD4683-B
AK4683
Sheet
Rev
A2
Date:
2 1
0 1
of
Tuesday, May 09, 2006
5
A
B
C
D
E
J10 AK4114-RX0
2 3 1
C30 R54 75 GND 0.1u
GND C31 10u
2 1
R53 10k D3.3V U4A D3.3V
2 1
K
D3.3V D1 HSU119
D3.3V U4B
4 3
MR-552LS
E
GND
C32 0.1u
74HC14
74HC14
L C33 0.1u
A
+
H SW1 ATE1D-2M3 AK4114-PDN
E
DVDD D3.3V
GND
C34 0.47u
R55 18k GND
PORT A-DIR/4683 DIF0 DIF1 DIF2 CM0 CM1 OCKS0 OCKS1 I2C
D
47
43
45
41
39
48
46
44
42
40
38
SW2
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
VCOM
AVSS
AVSS
AVSS
R
TEST1
AVDD
INT1
RX3
RX2
RX1
RX0
37
U5
D3.3V U4C
INT0 36 5 6
R56 1k
K
LED1 ERF
A
1
IPS0/RX4
D3.3V
74HC14
2 AVSS OCKS0/CSN/CAD0 35
OCKS0
D
RP1
9 8 7 6 5 4 3 2 1 3 DIF0/RX5 OCKS1/CCLK/SCL 34
OCKS1
CM0 CM1 OCKS0 OCKS1 I2C
4
TEST2
CM1/CDTI/SDA
33
CM1
5
DIF1/RX6
CM0/CDTO/CAD1
32
CM0
JP15 XTIA MCKO
47k GND
6 AVSS
DIF2/RX7
XTI
1
7
AK4114
PDN
31
SDTOA C35
30
X2
C
5p C36
JP16 ILRCKA DIR JP17 SDTIA1
MCLK2 BICKA OLRCKA ILRCKA
C
IPS1/IIC
XTO
11.2896MHz
28
2
8
29
5p GND
GND
9 P/SN DAUX
GND JP19 SDTIA2 DIR GND JP20 SDTIA3 DIR GND
SDTIA1
10
XTL0
MCKO2
27
SDTIA2
11
XTL1
BICK
26
SDTIA3
12
VIN MCKO1 DVDD COUT UOUT BOUT VOUT DVSS TVDD LRCK TX0 TX1
SDTO
25
JP21 MCLK-SEL MCKO2 MCKO1 JP22 BICKA JP24 OLRCKA JP23 SDTO SDTOA SDTOB
DGND2
MCLK BICKA OLRCKA SDTOA ILRCKA
PORT1
1 2 3 4 5 10 GND 9 MCKO 8 SDTIA1 7 SDTIA2 6 SDTIA3
13
14
NC
15
16
17
18
19
20
21
22
23
GND
B
24
GND PORT A SDTOB BICKB LRCKB
B
C37 0.1u +
C38 0.1u +
1
2
1
2
C39 10u 4114-TVDD J11 AK4114-TX1
2 3 1
C40 10u GND D3.3V GND DGND1
DIR
JP25 SDTIB
T1 DA02
R57 240
GND PORT2
1 2 3 4 5 10 GND 9 MCKO 8 SDTIB 7 6
SDTIB
MR-552LS
DGND2
R58 150 JP27 BICKB VDD JP28 LRCKB MCLK J12 MCKI
2 3 1 1
MCLK BICKB LRCKB SDTOB
PORT B
GND
A
A
GND U8A
2
JP29 MCKI MCLK2 MCKI MCLK2
Title Size Document Number
74HC14 GND
MR-552LS
AKD4683-B
DIR/DIT AK4114
Sheet
E
Rev
A3
Date:
B C D
0 2
of
Tuesday, May 09, 2006
5
A
5
4
3
2
1
8
8
D
+
LOUT1 R33 10k HVSS
3+ 2-
1
2 3 1
7
R35 10k MR-552LS
6-
2 3 1
JP1 LIN1 LIN1
LINA LINB
+
J1
+
C18 22u
P12V R34 U2A NJM5532 220
C19 22u LOUT1 LOUT2
5+
P12V R36 U2B NJM5532 220
D
J2
LOUT2
C20
2 3 1
J3 LINA
N12V VSS
4
330p C21
HVSS
N12V 330p C22 VSS
4
1u
MR-552LS JP2 LIN2 LIN2 LINB JP3 LIN3 LIN3 LINA LINB 1u JP4 LIN4 LIN4 LINB VSS LINA C52 +
2 3 1
MR-552LS LINA VSS
R38 4.7K
R37 4.7k
R40 4.7K
R39 4.7k
J7 LINB
HVSS
HVSS
MR-552LS
P12V + +
C
C23 22u R42 10k
ROUT1
3+ 2-
P12V U3A R41 NJM5532 220
1 2 3 1
C24 22u R43 10k
JP5 LIN5 J5
2 3 1
LINA
C
8
8
J4
ROUT1
ROUT2
5+ 6-
U3B R44 NJM5532 220
7
ROUT2
LIN5
LINB LINA LINB
JP6 MR-552LS LIN6 LIN6
HVSS
N12V 330p C26
4
MR-552LS HVSS VSS
N12V 330p C27
4
VSS + R47 4.7K R45 4.7k R48 4.7K R46 4.7k RIN1 HVSS HVSS JP8 RIN2 RIN2 RINB JP9 RIN3
B
C25 JP7 RIN1 RINB RINA RINA
2 3 1
J6 RINA
1u
MR-552LS VSS
RINA RINB
C56 +
2 3 1
J9 RINB
B
RIN3
1u JP10 RINA RIN4 RIN4 RINB + R51 HPR (short) R49 HPL (short) C28 100u C29 100u + J8
6 4 3
MR-552LS VSS
HP RIN5
JP11 RINA RIN5 RINB
01J0154 VSS RIN6
JP12 RINA RIN6 RINB
A
A
Title Size Document Number
AKD4683-B
Sheet
Rev
A3
Date:
5 4 3 2
Tuesday, May 09, 2006
INPUT/OUTPUT ANALOG
3
of
0 5
1
5
4
3
2
1
VDD U9
D
TX
1Y 2Y 3Y 4Y 4 7
VDD
R66 R68 R73
10k 10k 10k
R67 R70 R74
470 470 470
2 3 5 6 11 10 14 13 1 15
1A 1B 2A 2B 3A 3B 4A 4B A/B G
R69 R71 U7A
1 2
100 100 100 100
CSN CCLK/SCL CDTI/SDA CDTO DVSS
PORT3
5 6 5 6 IN VCC IF GND 4 3 2 1
D
VDD JP30 R72 1k C67 0.1u DVSS TX
OPT TX RCA
9 12
R75 R76
74LS07 VDD
TOTX176
PORT4
6 7 8 9 10 5 4 3 2 1
I2C CSN SCL/CCLK SDA/CDTI SDA(ACK)/CDTO
TX J13
2 3 1
T4 DA02
R78 330 R79 100
74HCT157 DGND2 MR-552LS R81 10k
GND
uP-I/F
VDD VSS VSS
C
C
RX0/1/2/3 PORT5
6 6 5 GND VCC GND OUT 4 3 2 1
L5 10u VDD C68 0.1u C69 + 10u R84 470 OPT JP33 RX0 C71 RCA RX0 OPT RX1 GND VSS OPT R85 75 VSS VSS
B
VDD
5
D2 1S1588
R82 VDD 10k U8B
3 4 5
VDD U8C
6
R83 PDN
TORX176
JP32 RX1
H SW3 ATE1D-2M3 PDN
L C70 0.1u
74HC14
74HC14 100
PVSS RX0 J14
2 3 1
0.1u
JP34 RX2 GND
GND LE1 4683-TVDD PR4553K 1k R86
VDD U8D
8 9
MR-552LS VSS
RX2
B
INT JP35 GND
74HC14
OPT JP36 RX3 GND RX3
GND
VSS
VSS
A
A
Title Size Document Number
AKD4683-B
Sheet
Rev
A3
Date:
5 4 3 2
Tuesday, May 09, 2006
INPUT/OUTPUT DIGITAL
4
of
1
0 5
5
4
3
2
1
T2 NJM78M05DL1A R59
D
+12V R60
-12V R61 P12V + + C44 47u (short) C45 47u HVSS C46 0.1u (short) N12V
D
AVDD1 (short) R62 AVDD2 (short) + C41 47u
OUT
GND
3
IN
1
C42 0.1u
C43 0.1u
2
HVSS
R63 DVDD (short) R64 PVDD (short) R87 VDD (short)
C
VSS
VSS
R88 4683-TVDD (short) R89 4114-TVDD (short) N12V
C
for NJM5532 x2
C48 0.1u
VSS T3 NJM78M05DL1A R90 HVDD (short) + C47 47u C72 0.1u
OUT GND 3 IN 1
C49 10u
C50 0.1u
for NJM5532 x2 P12V C57 0.1u + +
C73 0.1u
2
VSS
B
C58 10u
C59 0.1u
R65 D3.3V (short) + C53 47u C54 0.1u
2
T5 LT1117-3.3
OUT GND IN 3
1
C55 0.1u
for 74HC14(U4) D3.3V C62 0.1u
GND
U7B
3 4 9
U4D
8 11
U8E
10
74LS07 U7C
5 6 11
74HC14 U4E
10 13
74HC14 U8F
12
GND for 74HC14(U8), 74LS07(U7) VDD C63 0.1u C64 0.1u
74LS07 U7D
9 8 13
74HC14 U4F
12
74HC14
74LS07 U7E
11 10
74HC14
GND GND
74LS07 U7F
A
GND
A
13
12
74LS07
GND
Title Size Document Number
A3
Date:
5 4 3 2
+ C51 10u C60 10u
B
+
AKD4683-B
Power Supply
Sheet
1
Rev
0 5
of
Tuesday, May 09, 2006
5

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